Many semiconductors each having many signal lines, such as SRAMs (Static Random Access Memories) and an ASIC (Application Specific Integrated Circuits) frequently use a BGA (Ball Grid Array) package.
A semiconductor package typically such as a BGA package may be produced by a method that primarily mounts a silicon chip on a resin substrate and secondarily mounts it on a printed substrate through solder balls.
Technologies in the past include technologies that reduces the stress against the semiconductor package (refer to patent Document 1, patent Document 2, and patent Document 3).
[Patent Document 1]
International Publication Pamphlet No. WO 2006/100759
[Patent Document 2]
Japanese Patent No. 3919353
[Patent Document 3]
Japanese Patent No. 3493088
However, after the secondary mounting, the difference in thermal expansion coefficient between the substrate and the silicon causes intensive stress against the solder balls and/or solder pads at ends of the silicon chip, resulting in soldering peel during a temperature cycle test, for example.